Muhammad J.

Working in Digital Systems Design for the last 4 years: I've written RTL for server-class RISC-V SoC components, built an Image Signal Processor pipeline that runs on FPGA, and contributed to an actual chip tape-out on SkyWater's 130nm process. I've taken designs through the full life cycle — specification, simulation, FPGA prototyping, fabrication, and silicon bring-up in the lab, where I wrote C and assembly tests to validate real hardware. Alongside design work, I also write technical articles on chip design, RISC-V, and embedded systems — so if you need documentation or engineering content that's accurate and readable, I can help with that too. Feel free to reach out or send an invitation to get started. Keywords RISC-V | Computer Architecture | RTL Design | Verilog | SystemVerilog | Chisel | Bare-Metal Firmware | Embedded C | Assembly Language | FPGA Prototyping | SoC Integration | Silicon Bring-up