J. Agustin R.Private profile: Upwork shows its earnings only to signed-in members, so we check it every few weeks, not daily. MRR here is a rough estimate (Upwork's six-month earnings ÷ months active). Last read Nov 5, 2026.

@ Interested in joining challenging and outstanding prospect ventures. Looking forward to work with companies to obtain innovative and successful results in an effective and trustful environment. @ More than 20 years of expertise in Systems Engineering, SW Development & Digital HW Design. Mixed background in computer science, applied mathematics and electrical engineering. Proficient in algorithm to core functional definition, system architecture and integration, performance, testing and debugging. @ Application Domains: - Logic/Formal Solvers, Declarative programming. - Blockchain, smart contracts, mining, trading. - Digital Image Processing, Computer Vision. - IP cores, hardware accelerators, streaming, chipsets, microprocessors. - Signal/Audio Processing, Automatic Speech Recognition, FFT, MFCC. - Machine Learning, Clustering, Markov Models, HMM. - Bayesian Models, Dynamical System Estimation, Particle Filters. - Embedded Systems, DSP, IoT. - Security, Fuzzing, Symbolic Execution. - Compilers, emulation, virtualization. - Simulation. - Resource Scheduling and Optimization, Supply Chain Management. @ SOFTWARE ENGINEERING: - C/C++, CUDA, LLVM, Boost, OpenMP, OpenCV. - Python, Node.js, Matlab, Solidity. - Linux, gcc, cmake, valgrind. - Windows, Visual Studio, Interactive Brokers TWA API. - AWS, cloud back-end, databases, PostgreSQL - distributed systems, MPI, RPC, TCP, networks. @ HARDWARE DESIGN: - RTL/ESL design: VHDL, Verilog, SystemC - Design Automation, Logic Synthesis, Place & Route: DesignCompiler, DesignVision, Encounter, ICC. - Functional and Formal Verification: SystemVerilog, UVM, Modelsim, Formality. - Controllers, bridges, FIFO, Ethernet, i2c, DDR, AXI, Whishbone, SoC, FPGA, ASIC, VLSI. Hope to hear from you!