Fadi M.Private profile: Upwork shows its earnings only to signed-in members, so we check it every few weeks, not daily. MRR here is a rough estimate (Upwork's six-month earnings ÷ months active). Last read Nov 5, 2026.

I am a micro and nano electronics, VLSI and MEMS engineer. I am currently working at the CNT at Zewail city of science and technology. I have solid knowledge and background in the fields of micro and nano electronics and micro systems engineering. Skills: • Verilog/VHDL and Test Benches. • VLSI digital and analog electronic circuits, starting from transistor level to high abstraction levels such as ASIC and FPGAs. • Micro-Electro-Mechanical Systems (MEMS) design and simulations. • Microfabrication Techniques (Cleanroom hands-on experience with full lab credit hour). • Simulations: ModelSim and Testbenches - Synopsys Design Compiler - Cadence Virtuoso - COMSOL MultiPhysics - Sentaurus - SProcess . • Programming: MATLAB - C/C++ - python - Verilog - system Verilog - VHDL. • Cadence and Synopsys custom compiler Layout. • Scientific Research and Writing. experience: 1- As part of the Analog layout automation graduation project team, I wrote the C++ code for generating guard ring, Bulk ties and power connections for the automated current mirror design. 2- Designed a LNA from scratch using cadence software and performed pre and post layout analysis. 3- Performed full ASIC design process using Synopsys DC compiler. 4- Designed a mask design for micro tweezer using CleWin software. 5- Implemented EDA algorithms to perform partitioning, floor planning and timing analysis using C++. 6- Designed an amplifier with a band gap circuit using Cadence software and performed pre and post layout analysis. 7- Designed a 5-stages 6-bit digitally controlled ring oscillator using Cadence software and performed pre and post layout analysis. 8- Participated in designing face detection embedded system using raspberry pi in python programming language. 9- Participated in designing Maze solver game using C++. 10- Designed and studied the properties of a photonic crystal fiber using Comsol simulations. 11- Participated in Coding 180nm CMOS Not gate using Sentaurus.