Jiri S.
Senior FPGA/DSP Engineer | High-Speed ADC/DAC | RF & Mixed-Signal
I am a senior FPGA, DSP and hardware engineer with 22+ years of experience designing advanced digital systems for RF, signal processing and high-speed data acquisition. I develop complete FPGA solutions including HDL/RTL design, DSP pipelines, timing architectures, high-speed interfaces and mixed-signal hardware. FPGA Expertise • high-speed ADC/DAC interfacing • multi-channel data acquisition • DSP (FIR, FFT, DDC, filtering) • AXI / AXI-Stream / DMA data pipelines • PCIe, 10G Ethernet, JESD204B • low-latency, deterministic processing systems Experience with Intel/Altera (Agilex 5, Arria 10, Arria V, Stratix, Cyclone), Xilinx (Zynq, Ultrascale) and Efinix Trion/Titanium. Hardware / PCB Design • analog + mixed-signal hardware (RF front-ends, low-jitter clocking) • high-speed PCB design in Altium Designer • DDR2/DDR3/LPDDR4 memory interfaces • EMI-optimized design for sensitive applications Industries • MRI scanner receivers • radar receivers • RF/SDR systems • industrial measurement • high-speed data processing equipment I deliver clean, production-ready RTL, fully tested hardware and documented designs. Clients value my ability to take a complex system from concept to a stable, verified solution.
Earnings and projects
Last 6 months ÷ 6
Earnings, last 30 days
Read once a week before Oct 29, 2026, daily since. Dotted: longer than usual between two readings. Hatched: over two weeks without one.