Vijayvithal J.

tl;dr; I am an ASIC/FPGA expert with over 2 decades of experience designing ASICs for Intel, LSI, Texas Instruments and others. ASIC FPGA Design is not an individual task, It requires a well knit team to handle RTL, Verification, Validation and PnR. I run an small ASIC/FPGA Design consultancy and we generally allocate a team of 1-RTL + 2-Verification resources for each project task. Due to this we propose a weekly fixed price team contract of 2400 USD/Week instead of an hourly billing. **Professional Summary:** I am 1. An experienced ASIC/FPGA designer 2. With contribution to over a few dozen chip tapeouts in tech nodes from 7nm to 180nm, in a career spanning over 2 decades 3. With expertise in various domains, including Communications (WiFi, Ethernet), Imaging (DTV, Display), and SOC (ARM, RISCV). I possess a comprehensive skill set encompassing System Architecture, RTL Design (Verilog, VHDL, SystemVerilog, Bluespec), Verification (Cocotb), Synthesis, and Validation. Additionally, I have a strong understanding of firmware and device driver development processes. I am available for: Long term projects with a minimum budget of $5000 requiring engineers to perform roles in 1. SOC and IP Architecture 2. RTL Coding(Verilog, Systemverilog, VHDL, Bluespec Systemverilog & Chisel), & Verification(Cocotb, UVM) 3. FPGA based Validation. 4. Synthesis + STA **Areas of Expertise:** I specialize in the following domains: 1. Communication: PCIe, Ethernet, PCS, MAC, Serdes, WLAN 2. Cryptography 3. Video & Display Technologies 4. DSP 5. SoC and subsystem development 6. Processors: ARM, RISCV **Keywords:** Verilog, ASIC, FPGA, Synopsys, Xilinx, Altera, Intel, Vivado, Quartus, Modelsim, VCS, Synthesis, Perl, Tcl, ARM, RISC-V, VHDL, BSV, cocotb, UPF, ASIP **Work Experience:** Throughout my career, I have worked with the following technologies and contributed to various projects: 1. Networking and Communication: Ethernet Subsystems, Wireless LAN, DOCSIS, DTV 2. Cryptography 3. Display Subsystems and Video Processing 4. Microcontrollers & Peripherals 5. ARM and RISCV based subsystem design I am proficient in Verilog, VHDL, SystemC, SystemVerilog, Perl, Tcl, and Python (cocotb, myHDL). I have successfully contributed to the tapeout of over a dozen ASICs. **Why Hire Me?** If you are seeking a team of professionals from Silicon Architects to junior coders who can independently or with minimal supervision drive the entire process of turning your idea for an IP/Chip into a reality, I am the right candidate for you. With my expertise and the expertise of my team, we can handle the complete lifecycle, including studying product requirements/industry standards, proposing suitable architectures and work plans, defining micro-architectures, driving verification, implementing and verifying designs, and validating the final product. **Employment Details:** 1. Current: Dyumnin Semiconductor (7 Years) - Co-Founder, CEO 2. Texas Instruments: (10 Years) - RTL Lead 3. Intel (6 Years) - Architect Ethernet Subsystems 4. CEO of a company providing ASIC design consultancy to multiple startups in RISC-V, AI/ML domain Feel free to reach out to me to discuss your project requirements and how I can contribute to its success.